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Friday, December 12, 2008

Intel® Core™ i7 Processor Extreme Edition


Wield the ultimate gaming weapon

Conquer the world of extreme gaming with the fastest performing processor on the planet: the Intel® Core™ i7 processor Extreme Edition.¹ With faster, intelligent multi-core technology that accelerates performance to match your workload, it delivers an incredible breakthrough in gaming performance.

But performance doesn't stop at gaming. You'll multitask 25 percent faster and unleash incredible digital media creation with up to 79 percent faster video encoding and up to 46 percent faster image rendering, plus incredible performance for photo retouching and editing.¹

In fact, you'll experience maximum performance for whatever you do, thanks to the combination of Intel® Turbo Boost technology² and Intel® Hyper-Threading technology (Intel® HT technology)³, which activates full processing power exactly where and when you need it most.


Product information

  • 3.20 GHz core speed
  • 8 processing threads with Intel® HT technology
  • 8 MB of Intel® Smart Cache
  • 3 Channels of DDR3 1066 MHz memory

Features and benefits

Get extreme with your gaming and advanced multimedia.

Intel Core i7 processors deliver an incredible breakthrough in quad-core performance and feature the latest innovations in processor technologies:

  • Intel® Turbo Boost technology maximizes speed for demanding applications, dynamically accelerating performance to match your workload-more performance when you need it the most.²
  • Intel® Hyper-Threading technology enables highly threaded applications to get more work done in parallel. With 8 threads available to the operating system, multi-tasking becomes even easier.³
  • Intel® Smart Cache provides a higher-performance, more efficient cache subsystem. Optimized for industry leading multi-threaded games.
  • Intel® QuickPath Interconnect is designed for increased bandwidth and low latency. It can achieve data transfer speeds as high as 25.6 GB/sec with the Extreme Edition processor.
  • Integrated memory controller enables three channels of DDR3 1066 MHz memory, resulting in up to 25.6 GB/sec memory bandwidth. This memory controller's lower latency and higher memory bandwidth delivers amazing performance for data-intensive applications.
  • Intel® HD Boost significantly improves a broad range of multimedia and compute-intensive applications. The 128-bit SSE instructions are issued at a throughput rate of one per clock cycle, allowing a new level of processing efficiency with SSE4 optimized applications.

Intel® Desktop Board DX58SO


The Intel® Desktop Board DX58SO is designed to unleash the power of the all new Intel® Core™ i7 processors with support for up to eight threads of raw CPU processing power, triple channel DDR3 memory and full support for ATI CrossfireX* technology. Today’s PC games like Far Cry 2* and Call of Duty: World at War* need a computing platform that delivers maximum multi-threaded CPU support and eye-popping graphics support.


Features and benefits

Form factor ATX (12.00 inches by 9.60 inches [304.80 millimeters by 243.84 millimeters])
Processor Click View supported processors for the most current list of compatible processors.
At product launch, this desktop board supports:
Memory
  • Four 240-pin DDR3 SDRAM Dual Inline Memory Module (DIMM) sockets
  • Support for DDR3 1600 MHzς, DDR3 1333 MHzς, DDR3 1066 MHz
  • Support for up to 16 GBς of system memory
Chipset
Audio Intel® High Definition Audio subsystem in the following configuration:
  • 8-channel (7.1) Dolby Home Theater* Audio subsystem with five analog audio outputs and two S/PDIF digital audio outputs (coaxial and optical) using the Sigmatel* 9274D audio codec
Video
  • ATI CrossFire* multi-GPU platform support ATI CrossFire technology enables two ATI* graphics cards to work together for ultimate 3D gaming performance and visual quality
  • Full support of next-generation ATI CrossFire*
LAN support Gigabit (10/100/1000 Mbits/sec) LAN subsystem
Peripheral interfaces
  • Twelve USB 2.0 ports (8 external ports, 2 internal headers)
  • Six Serial ATA 3.0 Gb/s ports, including 2 eSATA port with RAID support supplied by a Marvell* controller
  • Two IEEE-1394a ports (1 external port, 1 internal header)
  • Consumer IR receiver and emitter (via internal headers)
Expansion capabilities
  • One PCI Conventional* bus add-in card connectors (SMBus routed to PCI Conventional bus add-in card connector)
  • One primary PCI Express* 2.0 x16 (electrical x16) bus add-in card connector
  • One secondary PCI Express 2.0 x16 (electrical x16) bus add-in card connector
  • One PCI Express* 1.0a x16 (electrical x4) bus add-in card connector

Intel® Desktop Board D101GGC


The Intel® Desktop Board D101GGC delivers an integrated graphics solution for your next value platform. The Intel® Desktop Board D101GGC supports the Intel® Pentium® D Processor, the Intel® Pentium® 4 Processor with Hyper-Threading Technology and the Intel® Celeron® D processor in the LGA775 package. This uATX board delivers both quality and value by offering features such as High Definition Audio and Realtek* 8101L 10/100 LAN. This desktop board also features PCI Express* x16, DDR 400/333 memory, and 8 USB 2.0 ports.
View Available Configurations
Get Windows* Hardware Quality Labs (WHQL) Information
View Industry Specifications
View Regulatory Compliance Information



Intel® Desktop Board D101GGC Features
Features Benefits
Form Factor microATX (9.60 inches by 8.60 inches [243.84 mm by 218.44 mm])
Processor
Support for an Intel® Pentium® D Processor in an LGA775 socket with an 800 MHz system bus
Support for an Intel® Pentium® 4 Processor in an LGA775 socket with an 800 or 533 MHz system bus
Support for an Intel® Celeron® D Processor in an LGA775 socket with a 533 MHz system bus
View all supported processors
Memory
Two DDR SDRAM Dual Inline Memory Module (DIMM) sockets
Support for DDR 400 MHz and DDR 333 MHz DIMMs
Support for up to 2 GB of system memory
Chipset ATI* Radeon* Xpress 200 Chipset
BIOS AwardBIOS* for Intel resident in the 4 Mbit FWH
I/O Control SMSC* SCH5017 Legacy I/O controller for hardware management, diskette drive, serial, parallel, and PS/2 ports
Audio High Definition Audio subsystem using the Realtek* ALC861 audio codec
Video Integrated ATI* Radeon* X300 based graphics
LAN Support 10/100 Mbits/sec LAN subsystem using the Realtek* 8101L LAN adapter device
Peripheral Interfaces
Eight USB 2.0 ports
One serial port
One parallel port
Four Serial ATA interfaces
Two parallel ATA IDE interfaces with UDMA 33, ATA-66/100 support
One diskette drive interface
PS/2 keyboard and mouse ports
Expansion Capabilities
Two PCI Conventional* bus connectors
One PCI Express* x1 bus add-in card connector
One PCI Express* x16 bus add-in card connector

Thursday, December 11, 2008

Intel A100


The Intel processors A100 and A110 are x86 architecture low-power microprocessors (code-named Stealey), with a Dothan core derived from the Intel Pentium M, built on a 90 nm process with 512KB L2 cache and 400MHz front side bus (FSB). The A100/A110 represent the CPU component of the McCaslin platform.[1] They are to be replaced in 2008 by the Menlow platform, including the Silverthorne (Intel Atom) 45nm CPU and Poulsbo chipset.[2]

The A110 runs at 800MHz, the A100 at 600MHz, and both have a TDP of 3 watts, and a power consumption in the lowest power state of only 0.4 watts.[3]

The A100 and A110 processors are part of the Intel Ultra Mobile Platform 2007[4] and were designed to be used in MIDs, UMPCs and Ultralight laptops, like the Kohjinsha Convertible Tablet PC.[5]

Itanium


Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel has released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together.

Itanium's architecture differs dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture is based on explicit instruction-level parallelism, in which the compiler makes the decisions about which instructions to execute in parallel. By contrast, other superscalar architectures depend on elaborate processor circuitry to keep track of instruction dependencies during runtime. This alternative approach helps current Itanium processors execute up to six instructions per clock cycle.

After a protracted development process, the first Itanium processor, codenamed Merced, was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers have also developed systems based on Itanium. As of 2007[update], Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC.[1] Intel released its newest Itanium, codenamed Montvale, in November 2007,[2] and has announced plans to release a quad-core Itanium processor (code-named Tukwila) to server OEMs in late 2008. Systems based on the new processor are expected to be available in early 2009,[3] more than a year later than Intel's initial projection.[4]

History Development: 1989–2001
In 1989, HP determined that reduced instruction set computer (RISC) architectures were approaching a processing limit at one instruction per cycle. HP researchers investigated a new architecture, later named explicitly parallel instruction computing (EPIC), that allows the processor to execute multiple instructions in each clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, in which a single instruction word contains multiple instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel.[7] The goal of this approach is two-fold: first, to enable deeper inspection of the code to identify additional opportunities for parallel execution; and, second, to simplify processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.

HP determined that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so HP partnered with Intel in 1994 to develop the IA-64 architecture, which derived from EPIC. Intel was willing to undertake a very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.[7]

During development, Intel, HP, and industry analysts predicted that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and complex instruction set computer (CISC) architectures for all general-purpose applications. Compaq and Silicon Graphics decided to abandon further development of the Alpha and MIPS architectures respectively in favor of migrating to IA-64.[8]

Several groups developed operating systems for the architecture, including Microsoft Windows, Linux, and UNIX variants such as HP-UX, Solaris,[9] [10] [11] Tru64 UNIX,[8] and Monterey/64[12] (the latter three were canceled before reaching the market). By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery of Merced began slipping.[13] Technical difficulties included the very high transistor counts needed to support the wide instruction words and the large caches. There were also structural problems within the project, as the two parts of the joint team used different methodologies and had slightly different priorities. Since Merced was the first EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depends on compiler capabilities that had never been implemented before, so more research was needed.

Intel announced the official name of the processor, Itanium, on October 4, 1999.[14] Within hours the name Itanic [15] had been coined in an online chat room, a reference to Titanic, the "unsinkable" ocean liner which sank in 1912. Itanic has since often been used by The Register,[16] Scott McNealy,[17] and others,[18][19] implying that the multibillion dollar investment in Itanium—and the tremendous early hype—would be followed by its relatively quick demise.

Original Itanium processor: 2001–02
By the time Itanium was released in June, 2001, it was no longer superior to contemporaneous RISC and CISC processors. Itanium competed at the low-end (primarily 4-CPU and smaller systems) with servers based on x86 processors, and at the high end with IBM's POWER architecture and Sun Microsystems' SPARC architecture. Intel repositioned Itanium to focus on high-end business and HPC computing, attempting to duplicate x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing PA-RISC and Alpha in HP systems and MIPS in SGI's HPC systems, though IBM also delivered a supercomputer based on this processor.[20] POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space. With economies of scale fueled by its enormous installed base, x86 has remained the preeminent "horizontal" architecture in enterprise computing.

Only a few thousand systems using the original Itanium processor were sold, due to relatively poor performance, high cost and limited software availability.[21] Recognizing that the lack of software could be a serious issue moving forward, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to market a year later.

Itanium 2 processors: 2002–present
The Itanium 2 processor was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The initial Itanium 2 was codenamed McKinley. McKinley was manufactured using a 180 nm process technology, and relieved many of the performance problems of the original Itanium processor.[22]

In 2003, AMD released the Opteron, which implemented its 64-bit architecture (x86-64). Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from x86. Intel responded by implementing x86-64 in its Xeon microprocessors in 2004.[8] Intel released a new Itanium 2 family member, codenamed Madison, in 2003. Madison used a 130 nm process and was the basis of all new Itanium processors until Montecito was released in June 2006.

In March, 2005, Intel announced that it was working on a new Itanium processor, codenamed Tukwila, to be released in 2007. Tukwila would have four processor cores and would replace the Itanium bus with a new Common System Interface, which would also be used by a new Xeon processor.[4] Intel later said that Tukwila would be delivered in late 2008.[23]

In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate software porting.[24] The Alliance announced that its members would invest $10 Billion in Itanium solutions by the end of the decade.[25]

In 2006, Intel delivered Montecito, a dual-core processor that roughly doubled performance and decreased energy consumption by about 20 percent. Quad-core Tukwila processors are still expected to be available to OEMs in late 2008, with systems reaching the marketplace in early 2009.[3]

In comparison with its Xeon family of server processors, Itanium is not a high-volume product for Intel. Intel does not release production numbers, but one industry analyst estimated that the production rate was 200,000 processors per year in 2007.[26] According to Gartner Inc., the total number of Itanium servers sold by all vendors in 2007 was about 55,000. This compares with 417,000 RISC servers (spread across all RISC vendors) and 8.4 million x86 servers. From 2001 through 2007, IDC reports that a total of 184,000 Itanium-based systems have been sold. For the combined POWER/SPARC/Itanium systems market, IDC reports that POWER captured 42% and SPARC captured 32%, while Itanium-based system revenue reached 26% in the second quarter of 2008.[27] According to an IDC analyst, HP currently accounts for perhaps 80% of Itanium systems revenue.[28]

Architecture
Intel has extensively documented the Itanium instruction set and microarchitecture,[29] and the technical press has provided overviews.[30][13] The architecture has been renamed several times during its history. HP originally called it PA-WideWord. Intel later called it IA-64, then Itanium Processor Architecture (IPA),[31] before settling on Intel Itanium Architecture, but it is still widely referred to as IA-64. It is a 64-bit register-rich explicitly-parallel architecture. The base data word is 64 bits, byte-addressable. The logical address space is 264 bytes. The architecture implements predication, speculation, and branch prediction. It uses a hardware register renaming mechanism rather than simple register windowing for parameter passing. The same mechanism is also used to permit parallel execution of loops. Speculation, prediction, predication, and renaming are under control of the compiler: each instruction word includes extra bits for this. This approach is the distinguishing characteristic of the architecture.

The architecture implements 128 integer registers, 128 floating point registers, 64 one-bit predicates, and eight branch registers. The floating point registers are 82 bits long to preserve precision for intermediate results.

Instruction execution
Each 128-bit instruction word contains three instructions, and the fetch mechanism can read up to two instruction words per clock from the L1 cache into the pipeline. When the compiler can take maximum advantage of this, the processor can execute six instructions per clock cycle. The processor has thirty functional execution units in eleven groups. Each unit can execute a particular subset of the instruction set, and each unit executes at a rate of one instruction per cycle unless execution stalls waiting for data. While not all units in a group execute identical subsets of the instruction set, common instructions can be executed in multiple units.

The execution unit groups include:

* Six general-purpose ALUs, two integer units, one shift unit
* Four data cache units
* Six multimedia units, two parallel shift units, one parallel multiply, one population count
* Two floating-point multiply-accumulate units, two "miscellaneous" floating-point units
* Three branch units

The compiler can often group instructions into sets of six that can execute at the same time. Since the floating-point units implement a multiply-accumulate operation, a single floating point instruction can perform the work of two instructions when the application requires a multiply followed by an add: this is very common in scientific processing. When it occurs, the processor can execute four FLOPs per cycle. For example, the 800 MHz Itanium had a theoretical rating of 3.2 GFLOPS and the fastest Itanium 2, at 1.67 GHz, was rated at 6.67 GFLOPS

Memory architecture
From 2002 to 2006, Itanium 2 processors shared a common cache hierarchy. They had 16 KB[32] of Level 1 instruction cache and 16 KB of Level 1 data cache. The L2 cache was unified (both instruction and data) and is 256 KB. The Level 3 cache was also unified and varied in size from 1.5 MB[32] to 24 MB. The 256 KB L2 cache contains sufficient logic to handle semaphore operations without disturbing the main arithmetic logic unit (ALU).

Main memory is accessed through a bus to an off-chip chipset. The Itanium 2 bus was initially called the McKinley bus, but is now usually referred to as the Itanium bus. The speed of the bus has increased steadily with new processor releases. The bus transfers 2x128 bits per clock cycle, so the 200 MHz McKinley bus transferred 6.4 GB/s[33] and the 533 MHz Montecito bus transfers 17.056 GB/s.

Architectural changes
Itanium processors released prior to 2006 had hardware support for the IA-32 architecture to permit support for legacy server applications, but performance for IA-32 code was much worse than for native code and also worse than the performance of contemporaneous x86 processors. In 2005, Intel developed the IA-32 Execution Layer (IA-32 EL), a software emulator that provides better performance. With Montecito, Intel therefore eliminated hardware support for IA-32 code.

In 2006, with the release of Montecito, Intel made a number of enhancements to the basic processor architecture including:[35]

* Hardware Multithreading: Each processor core maintains context for two threads of execution. When one thread stalls during memory access, the other thread can execute. Intel calls this "coarse multithreading" to distinguish it from the "hyperthreading technology" Intel integrated into some x86 and x86-64 microprocessors. Coarse multithreading is well matched to the Intel Itanium Architecture and results in an appreciable performance gain.
* Hardware Support for Virtualization: Intel added Intel Virtualization Technology (Intel VT), which provides hardware assists for core virtualization functions. Virtualization allows a software "hypervisor" to run multiple operating system instances on the processor concurrently.
* Cache Enhancements: Montecito added a split L2 cache, which included a dedicated 1 MB L2 cache for instructions. The original 256 KB L2 cache was converted to a dedicated data cache. Montecito also included up to 12MB of on-die L3 cache.

Hardware support Systems
As of 2008, several manufacturers offer Itanium systems, including HP, SGI, NEC, Fujitsu, Unisys, Hitachi, and Groupe Bull. In addition, Intel offers a chassis[36] that can be used by system integrators to build Itanium systems. HP, the only one of the industry's top four server manufacturers to offer Itanium-based systems today, manufactures at least 80% of all Itanium systems. HP sold 7200 systems in the first quarter of 2006.[37] The bulk of systems sold are enterprise servers and machines for large-scale technical computing, with an average selling price per system in excess of US$200,000. A typical system uses eight or more Itanium processors.

Chipsets
The Itanium bus interfaces to the rest of the system via a chipset. Enterprise server manufacturers differentiate their systems by designing and developing chipsets that interface the processor to memory, interconnections, and peripheral controllers. The chipset is the heart of the system-level architecture for each system design. Development of a chipset costs tens of millions of dollars and represents a major commitment to the use of the Itanium. Currently, modern chipsets for Itanium are manufactured by HP, Fujitsu, SGI, NEC, Hitachi, and Unisys. IBM created a chipset in 2003, and Intel in 2002, but neither of them has developed chipsets to support newer technologies such as DDR2 or PCI Express.[38]

The upcoming Itanium processor (Tukwila) has been designed to share a common chipset with the Intel Xeon processor EX (Intel’s Xeon processor designed for four processor and larger servers). The goal is to provide system development and cost-saving synergies for server OEMs, many of whom develop both Itanium- and Xeon-based servers.

Software support
In order to allow more software to run on the Itanium, Intel supported the development of effective compilers for its platform, especially its own suite of compilers.[39][40] GCC,[41][42] Open64 and MS Visual Studio 2005 (and later)[43] are also able to produce machine code for Itanium. As of 2008, Itanium is supported by Windows Server 2003 and Windows Server 2008, multiple Linux distributions (including Debian, Red Hat and Novell SuSE), FreeBSD,[44] and HP-UX, OpenVMS, and NonStop from HP, all natively. HP also sells a virtualization technology for Itanium called Integrity Virtual Machines. Itanium also supports mainframe environment GCOS from Groupe Bull and several IA-32 operating systems via Instruction Set Simulators. Using QuickTransit, application binary software for IRIX/MIPS and Solaris/SPARC can run via "dynamic binary translation" on Linux/Itanium. According to the Itanium Solutions Alliance, as of early 2008, over 13,000 applications are available for Itanium based systems,[45] though Sun has contested Itanium application counts in the past.[46] The ISA also supports Gelato, an Itanium HPC user group and developer community that ports and supports open source software for Itanium.[47]

The software requirements for Itanium were criticized by Donald Knuth who said: "... The Itanium approach ... was supposed to be so terrific—until it turned out that the wished-for compilers were basically impossible to write" [1].

Competition
The Itanium 2 competes in the enterprise server and high-performance computing (HPC) markets. Itanium's major competitors include Sun Microsystems' UltraSPARC IV+, Fujitsu's SPARC64, IBM's POWER6, AMD's Opteron, and Intel's own Xeon servers.

Throughout its history, Itanium has had the best floating point performance relative to fixed-point performance of any general-purpose microprocessor. This capability is useful in HPC systems but is not needed for most enterprise server workloads.[citation needed]

By 2005, Itanium systems accounted for about 14% of HPC systems revenue, but the percentage has declined as the industry shifts to x86-64 clusters for this application.[48]

Supercomputers & HPC
An Itanium-based computer first appeared on list of the TOP500 supercomputers in November 2001.[20] The best position ever achieved by an Itanium 2 based system in the list was #2, achieved in June 2004, when Thunder (LLNL) entered the list with an Rmax of 19.94 Teraflops. In November 2004, Columbia entered the list at #2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 84 systems (16.8%); by November 2008, this had dropped to nine systems (1.8%).[49]

New Itanium implementations in high performance computing (HPC) are primarily for research areas (such as biochemical research) where typical workloads perform better on large, shared memory systems rather than distributed clusters. These systems typically have 16 to 64 processors, and are not comparable in size to the supercomputers on the TOP500 list.

Processors Released processors
The Itanium processors show a steady progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130 nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90 nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667 MHz.

Xeon


The Xeon brand refers to many families of Intel's x86 multiprocessing CPUs – for dual-processor (DP) and multi-processor (MP) configuration on a single motherboard targeted at non-consumer markets of server and workstation computers, and also at blade servers and embedded systems. The Xeon brand has been maintained over several generations of x86 and x86-64 processors. Older models added the Xeon moniker to the end of the name of their corresponding desktop processor, but more recent models used the name Xeon on its own. The Xeon CPUs generally have more cache than their desktop counterparts in addition to multiprocessing capabilities. Intel's (non-x86) IA-64 processors are called Itanium, not Xeon.

Pentium II Xeon
The first Xeon branded processor was released in 1998, named the Pentium II Xeon (codenamed "Drake"), as the replacement of the Pentium Pro. It was based on the 0.25 µm "Deschutes" core (P6 microarchitecture) branded Pentium II (sharing its 80523 product code), used either a 440GX (a dual-processor workstation chipset) or 450NX (quad-processor, or oct with additional logic) chipset, and differed from the Pentium II desktop CPU (Deschutes) in that its off-die L2 cache ran at full speed. It also used a larger slot known as slot 2. Cache sizes were 512 KB, 1 MB, and 2 MB, and it used a 100 MT/s front side bus (FSB)[1].

Pentium III Xeon
In 1999, the Pentium II Xeon was replaced by the Pentium III Xeon. Reflecting the incremental changes from the Pentium II "Deschutes" core to the Pentium III "Katmai" core, the first Pentium III Xeon, named "Tanner", was just like its predecessor except for the addition of Streaming SIMD Extensions (SSE) and a few cache controller improvements. The second version, named "Cascades", was based on the Pentium III "Coppermine" core. The "Cascades" Xeon used a 133 MT/s bus and relatively small 256 KB on-die L2 cache resulting in almost the same capabilities as the Slot 1 Coppermine processors, which were capable of dual-processor operation but not quad-processor operation. To improve this situation, Intel released another version, officially also named "Cascades", but often referred to as "Cascades 2 MB". That came in two variants: with 1 MB or 2 MB of L2 cache. Its bus speed was fixed at 100 MT/s, though in practice the cache was able to offset this. Product codes for Tanner and Cascades mirrored that of Katmai and Coppermine; 80525 and 80526 respectively.

Xeon (DP) & Xeon MP (32-bit)
Foster
In mid-2001, the Xeon brand was introduced ("Pentium" was dropped from the name). The initial variant that used the new NetBurst architecture, "Foster", was slightly different from the desktop Pentium 4 ("Willamette"). It was a decent chip for workstations, but for server applications it was almost always outperformed by the older Cascades 2 MB core and AMD's Athlon MP. Combined with the need to use expensive Rambus Dynamic RAM, the Foster's sales were somewhat unimpressive.

At most two Foster processors could be accommodated in a symmetric multiprocessing (SMP) system built with a mainstream chipset, so a second version (Foster MP) was introduced with a 1 MB L3 cache and the Jackson Hyper-Threading capacity. This improved performance slightly, but not enough to lift it out of third place. It was also priced much higher than the dual-processor (DP) versions. The Foster shared the 80528 product code with Willamette.

Prestonia
In 2002 Intel released a 130 nm version of Xeon branded CPU, codenamed "Prestonia". It supported Intel's new Hyper-Threading technology and had a 512 KB L2 cache. This was based on the "Northwood" Pentium 4 core. A new server chipset, E7500 (which allowed the use of dual-channel DDR SDRAM) was released to support this processor in servers, and soon the bus speed was boosted to 533 MT/s (accompanied by new chipsets: the E7501 for servers and the E7505 for workstations). The Prestonia performed much better than its predecessor and noticeably better than Athlon MP. The support of new features in the E75xx series also gave it a key advantage over the Pentium III Xeon and Athlon MP branded CPUs (both stuck with rather old chipsets), and it quickly became the top-selling server/workstation processor.

Gallatin
Subsequent to the Prestonia was the "Gallatin", which had an L3 cache of 1 MB or 2 MB. Its Xeon MP version also performed much better than the Foster MP, and was popular in servers. Later experience with the 130 nm process allowed Intel to create the Xeon MP branded Gallatin with 4 MB cache. The Xeon branded Prestonia and Gallatin were designated 80532, like Northwood.

Xeon (DP) & Xeon MP (64-bit)
Due to a lack of success with Intel's Itanium and Itanium 2 processors, AMD was able to introduce x86-64, a 64-bit extension to the x86 architecture. Intel followed suit by including EM64T (almost identical) in the 90 nm version of the Pentium 4 ("Prescott"), and a Xeon version codenamed "Nocona" was released in 2004. Released with it were the E7525 (workstation), E7520 and E7320 (both server) chipsets, which added support for PCI Express, DDR-II and Serial ATA. The Xeon was noticeably slower than AMD's Opteron, although it could be faster in situations where Hyper-Threading came into play.

A slightly updated core called "Irwindale" was released in early 2005, with twice the L2 cache of Nocona and able to reduce its clockspeeds during low processor demand. However, independent tests showed that AMD's Opteron still outperformed Irwindale.

64-bit Xeon MPs were introduced in April 2005. The cheaper "Cranford" was an MP version of Nocona, while the more expensive "Potomac" was a Cranford with 8 MB of L3 cache. All these Prescott-derived Xeons have the product code 80546.

Dual-Core Xeon
"Paxville DP"
The first dual-core CPU branded Xeon, codenamed Paxville DP, product code 80551, was released by Intel on 10 October 2005. Paxville DP had NetBurst architecture, and was a dual-core equivalent of the single-core Irwindale (related to the Pentium D branded "Smithfield"") with 4 MB of L2 Cache (2 MB per core). The only one Paxville DP model released ran at 2.8 GHz, featured an 800 MT/s front side bus, and was produced using a 90 nm process.

7000-series "Paxville MP"
An MP-capable version of Paxville DP, codenamed Paxville MP, product code 80560, was released on 1 November 2005. There are two versions: one with 2 MB of L2 Cache (1 MB per core), and one with 4 MB of L2 (2 MB per core). Paxville MP, called the dual-core Xeon 7000-series, was produced using a 90 nm process. Paxville MP clock ranges between 2.67 GHz and 3.0 GHz (model numbers 7020-7041), with some models having a 667 MT/s FSB, and others having an 800 MT/s FSB.

LV (ULV), "Sossaman"
On 14 March 2006, Intel released a dual-core processor codenamed Sossaman and branded as Xeon LV (low-voltage). Subsequently an ULV (ultra-low-voltage) version was released. The Sossaman was a low-/ultra-low-power and double-processor capable CPU (like AMD Quad FX), based on the "Yonah" processor, for ultradense non-consumer environment (i.e. targeted at the blade-server and embedded markets), and it was rated at a thermal design power (TDP) of 31 W (LV: 1.66 GHz and 2 GHz ) and 15 W (ULV: 1.66 GHz)[2]. As such, it supported most of the same features as earlier Xeons: Virtualization Technology, 667 MT/s front side bus, and dual-core processing, but it did not support 64-bit operations, so it could not run 64-bit-only server software, such as Microsoft Exchange Server 2007, and therefore it was limited to only 16 GB of memory. A planned successor, codenamed "Merom MP" was to be a drop-in upgrade to allow Sossaman-based servers to upgrade to 64-bit capability. However, this was abandoned in favour of low-voltage versions of the Woodcrest LV processor leaving the Sossaman at a dead-end with no planned upgrades.

5000-series "Dempsey"
On 23 May 2006, Intel released the dual-core CPU (Xeon branded 5000 series) codenamed Dempsey (product code 80555). Released as the Dual-Core Xeon 5000-series, Dempsey is a NetBurst architecture processor produced using a 65 nm process, and is virtually identical to Intel's "Presler" Pentium Extreme Edition, except for the addition of SMP support, which lets Dempsey operate in dual-processor systems. Dempsey ranges between 2.50 GHz and 3.73 GHz (model numbers 5020-5080). Some models have a 667 MT/s FSB, and others have a 1066 MT/s FSB. Dempsey has 4 MB of L2 Cache (2 MB per core). A Medium Voltage model, at 3.2 GHz and 1066 MT/s FSB (model number 5063), has also been released. Dempsey also introduces a new interface for Xeon processors: Socket J, also known as LGA 771.

5100-series "Woodcrest"
On 26 June 2006, Intel released the dual-core CPU (Xeon branded 5100 series) codenamed Woodcrest (product code 80556); it was the first Intel Core microarchitecture processor to be launched on the market. It is a server and workstation version of the Intel Core 2 processor. Intel claims that it provides an 80% boost in performance, while reducing power consumption by 20% relative to the Pentium D.

Most models have a 1333 MT/s FSB, except for the 5110 and 5120, which have a 1066 MT/s FSB. The fastest processor (5160) operates at 3.0 GHz. All Woodcrests use LGA 771 and all except two models have a TDP of 65 W. The 5160 has a TDP of 80 W and the 5148LV (2.33 GHz) has a TDP of 40 W. The previous generation Xeons had a TDP of 130 W. All models support Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, with the "Demand Based Switching" power management option only on Dual-Core Xeon 5140 or above. Woodcrest has 4 MB of shared L2 Cache.

7100-series "Tulsa"
Released on 29 August 2006,[3] the 7100 series, codenamed Tulsa (product code 80550), is an improved version of Paxville MP, built on a 65 nm process, with 2 MB of L2 cache (1 MB per core) and up to 16 MB of L3 cache. It uses Socket 604 [1]. Tulsa was released in two lines: the N-line uses a 667 MT/s FSB, and the M-line uses an 800 MT/s FSB. The N-line ranges from 2.5 GHz to 3.5 GHz (model numbers 7110N-7150N), and the M-line ranges from 2.6 GHz to 3.4 GHz (model numbers 7110M-7140M). L3 cache ranges from 4 MB to 16 MB across the models.[4]

7200-series "Tigerton"
The 7200 series, codenamed Tigerton (product code 80564) is an MP-capable processor, similar to the 7300 series, but, in contrast, only one core is active on each silicon chip, and the other one is turned off (blocked), resulting as a dual-core capable processor.

3000-series "Conroe"
The 3000 series, codenamed Conroe (product code 80557) dual-core Xeon (branded) CPU,[5] released at the end of September 2006, was just a rebranded version of the Intel's mainstream Conroe, otherwise branded as Core 2 Duo (for consumer desktops). Unlike most Xeon processors, they only supported single-CPU operation. They use Socket T (LGA775), operate on a 1066 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Intel Processors with a number ending in "5" have a 1333 MT/s FSB.[6]

3100-series "Wolfdale"
The 3100 series, codenamed Wolfdale (product code 80570) dual-core Xeon (branded) CPU, was just rebranded version of the Intel's mainstream Wolfdale featuring the same 45 nm process and 6 MB of L2 cache. Unlike most Xeon processors, they only support single-CPU operation. They use Socket T (LGA775), operate on a 1333 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading.

5200-series "Wolfdale DP"
On 11 November 2007, Intel released the dual-core CPU (Xeon branded 5200 series) codenamed Wolfdale DP (product code 80573),[8] it is built on a 45 nm process like the desktop Core 2 Duo Wolfdale and the Xeon-SP Wolfdale, featuring Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, it is unclear whether the "Demand Based Switching" power management will be available on the L5238 which is scheduled for April 2008.[9] Wolfdale has 6 MB of shared L2 Cache.

Quad-Core and Multi-Core Xeon
3200-series "Kentsfield"
Intel released relabeled versions of its quad-core (2x2) Core 2 Quad processor as the Xeon 3200-series (product code 80562) on 7 January 2007.[10] The 2x2 "quad-core" (dual-die dual-core[11]) comprised two separate dual-core die next to each other in one CPU package. The models are the X3210, X3220 and X3230, running at 2.13 GHz, 2.4 GHz and 2.66 GHz, respectively.[12] Like the 3000-series, these models only support single-CPU operation and operate on a 1066 MHz front-side bus. It is targeted at the "blade" market.

3300-series "Yorkfield"
Intel released relabeled versions of its quad-core (2x2) Core 2 Quad processor as the Xeon 3300-series (product code 80569) comprised two separate dual-core dies next to each other in one CPU package and manufactured in a 45 nm process. The models are the X3320, X3350, X3360 and X3370, running at 2.50 GHz, 2.66 GHz, 2.83 GHz and 3.0 GHz, respectively. The L2 cache is a unified 6 MB per die (except for the X3320 with a smaller 3 MB L2 cache per die), and a front-side bus of 1333 MHz. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, as well as "Demand Based Switching".

5300-series "Clovertown"
A quad-core (2x2) successor of the Woodcrest for DP segment, consisting of two dual-core Woodcrest chips in one package similarly to the dual-core Pentium D branded CPUs (two single-core chips) or the quad-core Kentsfield. The Clovertown has been usually implemented with two Woodcrest dies on a multi-chip module, with 8 MB of L2 cache (4 MB per die). Like Woodcrest, lower models use a 1066 MT/s FSB, and higher models use a 1333 MT/s FSB. Intel released Clovertown, product code 80563, on 14 November 2006[13] with models E5310, E5320, E5335, E5345, and X5355, ranging from 1.6 GHz to 2.66 GHz. The E and X designations are borrowed from Intel's Core 2 model numbering scheme; an ending of -0 implies a 1066 MT/s FSB, and an ending of -5 implies a 1333 MT/s FSB.[12] All models have a TDP of 80 W with the exception of the X5355, which has a TDP of 120 W. A low-voltage version of Clovertown with a TDP of 50 W has a model numbers L5310, L5320 and L5335 (1.6 GHz, 1.86 GHz and 2.0 GHz respectively). The 3.0 GHz X5365 arrived in July 2007, and became available in the Apple Mac Pro [6] on 4 April 2007.[7][14] The X5365 is among the fastest processors, performing up to around 38 GFLOPS in the LINPACK benchmark.

5400-series "Harpertown"
On 11 November 2007 Intel presented Yorkfield based Xeons - called Harpertown (product code 80574) - to the public.[9] This family consists of dual die quad-core CPUs manufactured on a 45 nm process and featuring 1333 MHz to 1600 MHz front-side buses, with TDP rated from 50 W to 150 W depending on the model. These processors fit in the LGA771 socket. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, as well as the "Demand Based Switching", except the E5405, which lacks this feature. The supplementary character in front of the model-number represents the thermal rating: an L depicts an TDP of 50 W, an E depicts 80 W whereas a X is 120 W TDP or above. The speed of 3.00 GHz comes as four models, two models with 80 W TDP two other models with 120 W TDP with 1333 MHz or 1600 MHz front-side bus respectively. The fastest Harpertown is the X5492 whose TDP of 150 W is higher than those of the Prescott-based Xeon DP but having twice as many cores. (This CPU is also sold under the name "Core 2 Extreme QX9775" for use in the Intel SkullTrail system.)

Intel 1600 MHz front-side bus Xeon processors will drop into the Seaburg chipset whereas several mainboards featuring the Intel 5000/5200-chipset are enabled to run the processors with 1333 MHz front-side bus processors. Seaburg features support for dual PCIe 2.0 x16 slots and up to 128 GB of memory.

7300-series "Tigerton"
The 7300 series, codenamed Tigerton (product code 80565) is a four-socket (packaged in Socket 604) and greater capable quad-core processor, consisting of two dual core Core2 architecture silicon chips on a single ceramic module, similar to Intel's Xeon 5300 series Clovertown processor modules. It was announced on 5 September 2007 [10], and is currently shipping.

The 7300 series uses Intel's Caneland (Clarksboro) platform.

Intel claims the 7300 series Xeons offer more than twice the performance and more than three times the performance per watt as Intel's previous generation 7100 series. The 7300 series' Caneland chipset provides a point to point interface allowing the full front side bus bandwidth per processor.

The 7xxx series is aimed at the large server market, supporting configurations of up to 32 CPUs per host.

7400-series "Dunnington"
Dunnington[17] - the last CPU of the Penryn generation and Intel's first multi-core (above two) die - features a single-die six- (or hexa-) core design with three unified 3 MB L2 caches (resembling three merged 45 nm dual-core Wolfdale dies), and 96 KB L1 cache (Data) and 16 MB of L3 cache. It features 1066 MHz FSB, fits into the Tigerton's mPGA604 socket, and is compatible with the Caneland chipset. These processors support DDR2-1066 (533 MHz), and have a maximum TDP below 130 W. They are intended for blades and other stacked computer systems. Availability is scheduled for the second half of 2008. It will be followed shortly by the Nehalem microarchitecture.

Saturday, December 6, 2008

Intel® XML Software Suite 1.2



Today’s applications rely on data feeds from many sources, using technologies that are based on XML. XML is an omnipresent data representation standard in web service, Service Oriented Architecture (SOA) and other new web technology deployments. The verbosity, extensibility and flexibility of XML messages can create performance challenges for software developers and productivity challenges for enterprise applications.

The Intel® XML Software Suite delivers outstanding XML processing performance, great scalability across multi-processing environments and easy integration into existing XML applications, providing higher return on your XML investment.

The Intel XML Software Suite is a comprehensive suite of C++ and Java* software-based runtime libraries for Linux* and Windows* operating systems. The Intel XML Software Suite is standards compliant, to allow for easy integration into existing XML environments and is optimized for future Intel processors implementing the new Intel® Streaming SIMD Extensions (Intel® SSE) instructions and other features, to deliver extended capabilities, enhanced performance and greater energy efficiency for many applications.

Main features include:

  • Outstanding XML processing performance
  • Comprehensive XML processing functionality
  • Large XML file processing capacity
  • High conformance
  • Efficient memory management
  • Thread-Safe
  • Integrates the latest Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2) instructions

Version 1.2 Available Now! The Intel® XML Software Suite 1.2 release extends its high performance, comprehensive, easy to use XML processing library to include support for Intel® Core™ i7 processors, StAX API for Java*, user guide additions, increased interoperability with new application environments and several other product enhancements. The new version also integrates the upcoming Intel Streaming SIMD Extensions 4 (Intel SSE4) instructions to further boost XML processing performance.

Intel® Pentium® Processor


On Friday, November 7th 1997, a number of reports were posted to the Internet implying the possibility of a new erratum on the Pentium® processors and Pentium® processors with MMX™ technology. An erratum is a design defect or error which may cause a product to deviate from published specifications. Based on the Internet reports our engineering team quickly jumped on this issue. Once we were able to reproduce the behavior we confirmed that an erratum does exist which is now named the "Invalid Operand with Locked CMPXCHG8B instruction" erratum. We were also able to identify the following:

  • The "Invalid Operand with Locked CMPXCHG8B Instruction" erratum affects the Pentium® processor, Pentium® processor with MMX™ technology, Pentium OverDrive® Processor and Pentium OverDrive processors with MMX technology.
  • It does not affect the Pentium® Pro processor, Pentium® II processor and Intel486™ and earlier processors.
  • This invalid instruction is not in commercial software.
  • The erratum only occurs when the processor receives a specific invalid instruction. The result of this erratum is the system may "freeze" and would have to be turned off and rebooted to return to normal operation.
  • It is important to note that this erratum will only occur when someone has intentionally created this invalid instruction because they want to freeze the system.
  • We have identified a workaround that prevents the system from being "frozen" by this invalid instruction and allows it to continue normal operation. The workaround modifies the execution flow to avoid the system hang after the invalid instruction is received. The workaround can be implemented through the operating system software.

Technical Overview

The CMPXCHG8B instruction compares a 64-bit value from internal registers of the processor with a 64-bit value from memory (the destination). It is illegal to use a register as the destination. The result of the CMPXCHG8B instruction is a 64-bit value that will not fit into a 32-bit register. If a register is used as the destination, the processor normally stops execution of the CMPXCH8B instruction, signals this error condition and executes an error handler in software.

This erratum occurs if the CMPXCHG8B instruction is also locked (a special instruction to the processor to allow the completion of the CMPXCHG8B instruction without being interrupted), and an invalid register destination is used. In this case the processor signals the error condition but may not allow the error handler to begin due to the lock on the CMPXCH8B instruction. As a result, the system hangs and the system must be re-booted to return to normal operation.

This issue does not cause data corruption or physical damage to a user’s system. Any data saved to disk in the course of work remains on the disk and will be available for use when the system is re-booted.

The "Invalid Operand with Locked CMPXCHG8B Instruction" is erratum #81 on the Pentium processor errata list. For more information please see: Erratum Technical Description

Workaround Overview

We have identified a workaround that can be implemented through the operating system. Basically, the workaround avoids the bus lock condition and allows the processor to execute the error handler. For the full technical description see: Workaround, in the Erratum Technical Description. Software vendors may also want to see the Software Backgrounder for more specific detail.

Intel has been working with industry operating system vendors to assist them in implementing this workaround for their operating systems. We will continue to work with them to implement the workaround in their operating systems. Users should contact their operating system vendor for specific availability of the workaround for that OS. A number of software vendors have already contributed statements with regard to this erratum. See: Software Vendor Statements

For more information see Intel Contacts for the phone number in your region.

Intel® Multi-Core Technology


Permanently altering the course of computing as we know it, Intel® multi-core technology provides new levels of energy-efficient performance, enabled by advanced parallel processing and next-generation hafnium-based 45nm technology. Incorporating multiple processor execution cores in a single package delivering full parallel execution of multiple software threads, Intel multi-core technology enables each core to run at a lower frequency, dividing the power normally given to a single core. This provides a breakthrough experience in notebook and desktop PCs, workstations, and servers.

Central to our technology roadmap, Intel® multi-core processors based on 45nm Intel® Core™ microarchitecture are paving the way to the next revolution in processor technology—next-generation 32nm multi-core processors. By innovating future architectures that can hold dozens or even hundreds of processors on a single die, we're ensuring that Intel® technologies will continue to outpace demands well into the future.

Intel® Core™2 Extreme Processor


Intel® Core™2 Extreme quad-core processor

When more is better—with four processing cores the Intel Core 2 Extreme processor delivers unrivaled¹ performance for the latest, greatest generation of multi-threaded games and multimedia apps.


Now with a new version based on Intel's cutting edge 45nm technology utilizing hafnium-infused circuitry to deliver even greater performance and power efficiency. The Intel® Core™2 Extreme processor QX9770 running at 3.2 GHz delivers the best possible experience for today's most demanding users.

  • 12 MB of total L2 cache
  • 1600 MHz front side bus



Intel® Centrino® 2 with vPro™ Technology


Keep your workforce more secure, managed, and mobile. With security and manageability built right onto the chip, Intel® Centrino® 2 with vPro™ technology provides hardware-assisted remote isolation, diagnostics, and repair, so you can manage your mobile workforce remotely, even if the system's OS is unresponsive.¹ And with exceptional dual-core performance, 5X better wireless performanceΩ and the longest possible battery life.²

Now you can also get notebooks with Intel Centrino 2 with vPro technology in astonishingly thin and light packages. As the smallest version of Intel® Centrino® processor technology yet-50 percent smaller-you're most mobile workforce can enjoy the sleekest full-featured and performance packed notebooks³ along with improved energy efficiency and power savings.°

Friday, December 5, 2008

Intel® Core™2 Quad Processors




Introducing Intel® Core™2 Quad processor for notebook and desktop PCs, designed to handle massive compute and visualization workloads enabled by powerful multi-core technology. Optimized for the longest possible battery life without compromise to performance, Intel Core 2 Quad processors for notebooks allow you to stay unwired longer while running the most compute-intensive applications.

Providing all the bandwidth you need for next-generation highly-threaded applications, the latest four-core Intel Core 2 Quad processors are built on 45nm Intel® Core™ microarchitecture enabling faster, cooler, and quieter mobile and desktop PC and workstation experiences.

Plus, with optional Intel® vPro™ technology, you have the ability to remotely isolate, diagnose, and repair infected desktop and mobile workstations wirelessly and outside of the firewall, even if the PC is off, or the OS is unresponsive.

Product information

Features and Benefits

With four processing cores, up to 12MB of shared L2 cache,¹ and up to 1066 MHz Front Side Bus for notebooks, and up to 12MB of L2 cache² and up to 1333 MHz Front Side Bus for desktops, the Intel Core 2 Quad processor delivers amazing performance and power efficiency enabled by the all new hafnium-based circuitry of 45nm Intel Core microarchitecture.

Whether you're encoding, rendering, editing, or streaming HD multimedia in the office or on the go, power your most demanding applications with notebooks and desktops based on the Intel Core 2 Quad processor.

Intel® Core™2 Duo Processors


Intel® Core™ 2 Duo desktop processors

With Intel Core 2 Duo desktop processor, you'll experience revolutionary performance, unbelievable system responsiveness, and energy-efficiency second to none.

Big, big performance. More energy efficient.¹ Now available in smaller packages. The Intel Core 2 Duo processor-based desktop PC was designed from the ground up for energy efficiency, letting you enjoy higher performing, ultra-quiet, sleek, and low power desktop PC designs.

Multitask with reckless abandon. Do more at the same time, like playing your favorite music, running virus scan in the background, and all while you edit video or pictures. The powerful Intel Core 2 Duo desktop processor provides you with the speed you need to perform any and all tasks imaginable.

Love your PC again. Don’t settle for anything less than the very best. Find your perfect desktop powered by the Intel Core 2 Duo processor and get the best processing technology money can buy. Only from Intel.

  • • Up to 6MB L2 cache
  • • Up to 1333 MHz front side bus